1. Field of the Invention
The present invention generally relates to a static memory cell and a static memory, and more particularly, to a static memory cell which can work with a sub-threshold voltage and a static memory.
2. Description of Related Art
FIG. 1 is a circuit diagram of a conventional static memory cell 100. Please refer to FIG. 1, the static memory cell 100 includes transistors M1-M6 and transistors MP1 and MP2. When a data writing operation is performed on the static memory cell 100, the transistors MP1 and MP2 are turned off through a transverse word line signal WL and a column selection signal CS, and the transistors M1-M4 are cut off from a reference operating power supply VDD. Meanwhile, the transistors M5 and M6 are turned on through the word line signal WL, so that data on the bit line BL and the reverse bit line BLB can be transmitted to the transistors M1-M4. When the transistors MP1 and MP2 are turned off, data on the bit line BL and the reverse bit line BLB can be easily and quickly written into the latch circuit constituted by the transistors M1-M4. Thereby, the data writing performance is effectively improved.
When a data writing operation is performed on the conventional static memory cell 100, only data of logic 0 can be written through the N-type transistors M3 and M4 according to the voltage on the ground terminal GND. However, when data of logic 1 is to be written, there is no P-type transistor for performing such an operation. As a result, the writing process may be affected by noises and become unreliable. In addition, when a data writing operation is performed on the static memory cell 100, the voltage on the storage point ST for storing data is also affected by the voltage division effect of the transistors M5 and M3, and when the transistor M3 offers a high driving capability, the voltage on the storage point ST is low therefore is easily affected by noises. This phenomenon becomes more obvious when the voltage level of the reference operating power supply VDD is lower. Thus, the static memory cell 100 cannot work with a low reference operating power supply VDD.